Articles by Roan Richmond

RISC-V is an open instruction set architecture (ISA) in comparison with the proprietary x86 or Arm architectures. Codethink Trustable and Reproducible Linux (CTRL) is an automotive and industrial operating system, which is being actively used today. Therefore, porting CTRL onto RISC-V displays how ready the architecture is to become a major player in the automotive industry. The move to RISC-V has never been easier and supporting this open architecture is the valuable next stage.

Adding big‑endian support to CVA6 RISC‑V FPGA processor

We added big‑endian support for an open-source RISC‑V processor and booted Linux on it, using an FPGA board.

Big-Endian

Codethink investigates big-endian support on little-endian architectures by exploring RISC-V's new runtime-controllable endianness, with QEMU as testing base.

Author Index

Get in touch to find out how Codethink can help you

connect@codethink.co.uk +44 161 660 9930